dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 536
dsp56000
Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56000.pdf
(637 pages)
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Operation:
Description: Subtract the source operand S and the carry bit C of the condition code
register from the destination operand D and store the result in the destination accumula-
tor. Long words (48 bits) may be subtracted from the (56-bit) destination accumulator.
Note: The carry bit is set correctly for multiple-precision arithmetic using long-word oper-
ands if the extension register of the destination accumulator (A2 or B2) is the sign exten-
sion of bit 47 of the destination accumulator (A or B).
Example:
A - 270
SBC
D–S–C
MOVE L:<$0,X
MOVE L:<$1,A
MOVE L:<$2,Y
SUB X,A L:<$3,B
SBC YB A10,L:<$4
MOVE B10,L:<$5
A
X
B
Y
:
:
D (parallel move)
$00:000000:000000
$00:000000:000003
Before Execution
$800000:000000
$000000:000001
Freescale Semiconductor, Inc.
For More Information On This Product,
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Subtract Long with Carry
Go to: www.freescale.com
;get a 48-bit LS long-word operand in X
;get other LS long word in A (sign ext.)
;get a 48-bit MS long-word operand in Y
;sub. LS words; get other MS word in B
;sub. MS words with carry; save LS dif.
;save MS difference
Assembler Syntax:
A
X
B
Y
SBC
$00:800000:000000
$00:000000:000001
$800000:000000
$000000:000001
After Execution
S,D (parallel move)
MOTOROLA
SBC
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