dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 350

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

Example: (4-Quadrant division, 24-bit signed quotient, 48-bit signed remainder)
SAVEQUO TFR X0,B B0,X1
DONE
Explanation of Example: Prior to execution, the 56-bit A accumulator contains the 56-
bit, sign-extended fractional dividend D (D=$00.0E66D7:F2832C=0.112513535894635
approx.) and the 24-bit X0 register contains the 24-bit, signed fractional divisor S
(S=$123456=0.142222166061401). Since |D|<|S|, the execution of the previous divide
routine stores the correct 24-bit signed quotient in the 24-bit X1 register (A/
X0=0.79111111164093=$654321=X1). The partial remainder is restored by reversing
the last DIV operation and adding back the absolute value of the signed divisor in X0 to
the partial remainder in A1. This produces the correct LS 24 bits of the 48-bit signed
remained in the 24-bit B1 register. Note that the remainder is really a 48-bit value which
has 24 bits of precision. Thus, the correct 48-bit remainder is $000000:000100 which
equals 0.0000000000018190 approximately.
A - 84
DIV
X0
X1
A
B
ABS A A,B
EOR X0,B B,X:$0
AND #$FE,CCR
REP #$18
DIV X0,A
TFR A,B
JPL SAVEQUO
NEG B
ABS B
ADD A,B
JCLR #23,X:$0,DONE
MOVE #$0,B0
NEG B
. . . . . . .
$00:000000:000000
$00:0E66D7:F2832C
Before Execution
Freescale Semiconductor, Inc.
For More Information On This Product,
$000000
$123456
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
Divide Interation
;make dividend positive, copy A1 to B1
;save rem. sign in X:$0, quo. sign in N
;clear carry bit C (quotient sign bit)
;form a 24-bit quotient
;form quotient in A0, remainder in A1
;save quotient and remainder in B1,B0
;go to SAVEQUO if quotient is positive
;complement quotient if N bit set
;save quo. in X1, get signed divisor
;get absolute value of signed divisor
;restore remainder in B1
;go to DONE if remainder is positive
;clear LS 24 bits of B
;complement remainder if negative
X0
X1
A
B
$FF:EDCCAA:654321
$00:000100:654321
After Execution
$123456
$654321
MOTOROLA
DIV