dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 410

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

Assembler Syntax:
Description: Logically shift bits 47–24 of the destination operand D one bit to the left
and store the result in the destination accumulator. Prior to instruction execution, bit 47
of D is shifted into the carry bit C, and a zero is shifted into bit 24 of the destination accu-
mulator D. This instruction is a 24-bit operation. The remaining bits of the destination
operand D are not affected. If a zero shift count is specified, the carry bit is cleared. The
difference between LSL and ASL is that LSL operates on only A1 or B1 and always
clears the V bit.
Example:
Explanation of Example: Prior to execution, the 56-bit B accumulator contains the
value $00:F01234:13579B. The execution of the LSL B instruction shifts the 24-bit value
in the B1 register one bit to the left and stores the result back in the B1 register.
A - 144
Operation:
LSL
LSL B1 #$7F,R0
SR
B
:
:
C
$00:F01234:13579B
Before Execution
Freescale Semiconductor, Inc.
47
For More Information On This Product,
LSL
INSTRUCTION DESCRIPTIONS
$0300
INSTRUCTION SET DETAILS
Go to: www.freescale.com
;shift B1 one bit to the left, set up R0
Logical Shift Left
D (parallel move)
24
SR
B
0 (parallel move)
$00:E02468:13579B
After Execution
$0309
MOTOROLA
LSL