dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 409

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Instruction Format:
JSSET #n,S,xxxx
Opcode:
Instruction Fields:
#n=bit number=bbbbb,
S=source register=DDDDDD,
xxxx=16-bit Absolute Address in extension word
4 registers in Data ALU
8 accumulators in Data ALU
8 address registers in AGU
8 address offset registers in AGU
8 address modifier registers in AGU
8 program controller registers
See Section A.10 and Table A-18 for specific register encodings.
Notes: If A or B is specified as the destination operand, the following sequence of
Timing: 6+jx oscillator clock cycles
Memory: 2 program words
MOTOROLA
JSSET
Source Register
1. The S bit is computed according to its definition (See Section A.5)
2. The accumulator value is scaled according to the scaling mode bits S0
3. If the accumulator extension is in use, the output of the shifter is limited to
4. The bit test is performed on the resulting 24-bit value, and the jump to sub-
events takes place:
and S1 in the status register (SR).
the maximum positive or negative saturation constant, and the L bit is set.
routine is taken if the bit tested is set. The original contents of A or B are not
changed.
23
0
0
0
0
1
Freescale Semiconductor, Inc.
0
For More Information On This Product,
INSTRUCTION DESCRIPTIONS
1
INSTRUCTION SET DETAILS
Jump to Subroutine if Bit Set
16
1
Go to: www.freescale.com
ABSOLUTE ADDRESS EXTENSION
1
15
1
D D D D D D
0 0 0 1 D D
0 0 1 D D D
0 1 0 T T T
0 1 1 N N N
1 0 0 F F F
1 1 1 G G G
D
D
D
D
D
D
8
0
7
Bit Number bbbbb
0
1
10111
00000
b
b
JSSET
b
b
0
b
A - 143

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