dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 49

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

3.5
The Data ALU features 24-bit input/output data registers that can be concatenated to ac-
commodate 48-bit data and two 56-bit accumulators, which are segmented into three 24-
bit pieces that can be transferred over the buses. Figure 3-14 illustrates how the registers
in the programming model are grouped.
3.6
The Data ALU performs arithmetic operations involving multiply and accumulate opera-
tions. It executes all instructions in one machine cycle and is not pipelined. The two 24-bit
numbers being multiplied can come from the X registers (X0 or X1) or Y registers (Y0 or
Y1). After multiplication, they are added (or subtracted) with one of the 56-bit accumula-
tors and can be convergently rounded to 24 bits. The convergent-rounding forcing
function detects the $800000 condition in the LSP and makes the correction as neces-
sary. The final result is then stored in one of the accumulators as a valid 56-bit number.
The condition code bits are set based on the rounded output of the logic unit.
MOTOROLA
23
*Read as sign extension bits, written as don’t care.
47
23
DATA ALU PROGRAMMING MODEL
DATA ALU SUMMARY
*
X1
8 7 0 23
55
A2
0 23
A
X
A1
X0
Freescale Semiconductor, Inc.
Figure 3-14 DSP56K Programming Model
DATA ALU PROGRAMMING MODEL
For More Information On This Product,
DATA ARITHMETIC LOGIC UNIT
0 23
0
0
Go to: www.freescale.com
ACCUMULATOR REGISTERS
A0
INPUT REGISTERS
DATA ALU
DATA ALU
0
0
23
*
8 7 0 23
55
B2
47
23
B1
Y1
0 23
0 23
Y
B
B0
Y0
0
0
3 - 19
0
0