dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 62

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

ify the contents of Rn without an associated data move.
4.4.1.6
The address of the operand is the sum of the contents of the address register, Rn, and
the contents of the address offset register, Nn (see Table 4-1 and Figure 4-9). The con-
tents of the Rn and Nn registers are unchanged. This addressing mode, which requires
4 - 12
EXAMPLE: MOVE Y0,Y: (R3)-
Assembler Syntax: (Rn)–
Memory Spaces: P:, X:, Y:, XY:, L:
Additional Instruction Execution Time (Clocks): 0
Additional Effective Address Words: 0
47
23
1 2
Indexed By Offset Nn
Figure 4-6 Address Register Indirect — Postdecrement
Y1
3
BEFORE EXECUTION
1
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24 23
0 23
3
Freescale Semiconductor, Inc.
23
X X X X X X
X X X X X X
4 5
For More Information On This Product,
M3
R3
N3
Y MEMORY
ADDRESS GENERATION UNIT
15
15
15
Y0
6
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5
ADDRESSING
0
6
0
0
0
0
0
47
23
1 2
Y1
3
AFTER EXECUTION
1
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2
24 23
3
0 23
23
4 5
X X X X X X
4
M3
R3
N3
Y MEMORY
5
15
15
15
6
Y0
6
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4
4
5
MOTOROLA
5
6
0
0
0
0
6
0
0