dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 387

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Instruction Format:
Opcode:
Instruction Fields:
Addressing Mode M M M R R R
(Rn)–Nn
(Rn)+Nn0
(Rn)–
(Rn)+
(Rn)
(Rn+Nn)
–(Rn)
Absolute address
where “rrr” refers to an address register R0–R7
Timing: 4+jx oscillator clock cycles
Memory: 1+ea program words
MOTOROLA
JScc
Effective
JScc ea
cc=4-bit condition code=CCCC,
ea=6-bit Effective Address=MMMRRR
23
0
0
0
0
0 0 0 r r r
0 0 1 r r r
0 1 0 r r r
0 1 1 r r r
1 0 0 r r r
1 0 1 r r r
1 1 1 r r r
1 1 0 0 0 0
1
Freescale Semiconductor, Inc.
0
For More Information On This Product,
Jump to Subroutine Conditionally
INSTRUCTION DESCRIPTIONS
1
INSTRUCTION SET DETAILS
OPTIONAL EFFECTIVE ADDRESS EXTENSION
16
1
Go to: www.freescale.com
1
15
1
Mnemonic C C C C
CC (HS)
GE
NE
PL
NN
EC
LC
GT
M
M
M
R
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
R
R
8
1
7
0
Mnemonic C C C C
CS (LO)
LT
EQ
MI
NR
ES
LS
LE
1
0
C
C
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
JScc
C C
0
A - 121

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