dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 468

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

Operation:
where ( . . . . . ) refers to any arithmetic or logical instruction which allows parallel moves.
Description: Move a one-word operand from/to X memory and move another word
operand from/to Y memory. Note that two independent effective addresses are specified
(<eax> and <eay>) where one of the effective addresses uses the lower bank of address
registers (R0–R3) while the other effective address uses the upper bank of address reg-
isters (R4–R7). All parallel addressing modes may be used.
If the arithmetic or logical opcode-operand portion of the instruction specifies a given
destination accumulator, that same accumulator or portion of that accumulator may not
be specified as a destination D1 or D2 in the parallel data bus move operation. Thus, if
the opcode-operand portion of the instruction specifies the 56-bit A accumulator as its
destination, the parallel data bus move portion of the instruction may not specify A as its
destination D1 or D2. Similarly, if the opcode-operand portion of the instruction specifies
the 56-bit B accumulator as its destination, the parallel data bus move portion of the
instruction may not specify B as its destination D1 or D2. That is, duplicate destina-
tions are NOT allowed within the same instruction. D1 and D2 may not specify the
same register.
If the opcode-operand portion of the instruction specifies a given source or destination
register, that same register or portion of that register may be used as a source S1 and/or
S2 in the parallel data bus move operation. This allows data to be moved in the same
instruction in which it is being used as a source operand by a data ALU operation. That
is, duplicate sources are allowed within the same instruction. Note that S1 and S2
may specify the same register.
A - 202
X: Y:
( . . . . . ); X:<eax>
( . . . . . ); X:<eax>
( . . . . . ); S1
( . . . . . ); S1
X:<eax>; Y:<eay>
X:<eax>; S2
Freescale Semiconductor, Inc.
D1; Y:<eay>
D1; S2
For More Information On This Product,
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
XY Memory Data Move
Go to: www.freescale.com
Y:<eay>
Y:<eay>
D2
D2
Assembler Syntax:
( . . . . . ) X:<eax>,D1
( . . . . . ) X:<eax>,D1
( . . . . . ) S1,X:<eax>
( . . . . . ) S1,X:<eax>
Y:<eay>,D2
S2,Y:<eay>
Y:<eay>,D2
S2,Y:<eay>
MOTOROLA
X: Y: