dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 366

• Manufacturer Part Number: dsp56000
• Description: 24-bit Digital Signal Processor Family Manual
• Manufacturer: Freescale Semiconductor, Inc

Operation:
Description: Logically exclusive OR the source operand S with bits 47–24 of the desti-
nation operand D and store the result in bits 47–24 of the destination accumulator. This
instruction is a 24-bit operation. The remaining bits of the destination operand D are not
affected.
Example:
Explanation of Example: Prior to execution, the 24-bit Y1 register contains the value
$000003, and the 56-bit B accumulator contains the value $00:000005:000000. The
EOR Y1,B instruction logically exclusive ORs the 24-bit value in the Y1 register with bits
47–24 of the B accumulator (B1) and stores the result in the B accumulator with bits 55–
48 and 23–0 unchanged.
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if data limiting has occurred during parallel move
N — Set if bit 47 of A or B result is set
Z— Set if bits 47 - 24 of A or B result are zero
V — Always cleared
A - 100
EOR
S
where
EOR Y1,B1
D[47:24]
Y1
B
15
LF
:
:
denotes the logical Exclusive OR operator
DM
14
$00:000005:000000
Before Execution
13
T
D[47:24] (parallel move)
Freescale Semiconductor, Inc.
(R2)+
**
12
For More Information On This Product,
$000003
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
S0
10
Go to: www.freescale.com
Logical Exclusive OR
I1
9
;Exclusive OR Y1 with B1, update R2
I0
8
S
7
Assembler Syntax:
Y1
B
L
6
EOR S,D (parallel move)
E
5
$00:000006:000000
After Execution
U
4
CCR
N
3
$000003
Z
2
V
1
C
0
MOTOROLA
EOR