dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 329

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Notes: If A or B is specified as the destination operand, the following sequence of events
Timing: 4+mvb oscillator clock cycles
Memory: 1+ea program words
MOTOROLA
BSET
1. The S bit is computed according to its definition (See Section A.5)
2. The accumulator value is scaled according to the scaling mode bits S0
3. If the accumulator extension is in use, the output of the shifter is limited
4. The resulting 24 bit value is placed back into A1 or B1. A0 or B0 is
5. The bit test and set is performed on A1 or B1, and the C bit is set if the
takes place:
and S1 in the status register (SR).
to the maximum positive or negative saturation constant, and the L bit is
set.
cleared and the sign of A1 or B1 is extended into A2 or B2.
bit tested is set.
Freescale Semiconductor, Inc.
For More Information On This Product,
INSTRUCTION DESCRIPTIONS
INSTRUCTION SET DETAILS
Go to: www.freescale.com
Bit Test and Set
A - 63

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