dsp56000 Freescale Semiconductor, Inc, dsp56000 Datasheet - Page 421

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dsp56000

Manufacturer Part Number
dsp56000
Description
24-bit Digital Signal Processor Family Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Explanation of Example 1: Prior to execution, the 24-bit X0 register contains the value
$123456 (0.142222166), the 24-bit Y0 register contains the value $123456
(0.142222166), and the 56-bit B accumulator contains the value $00:100000:000000
(0.125). The execution of the MACR X0,Y0,B instruction multiples the 24-bit signed
value in the X0 register by the 24-bit signed value in the Y0 register, adds the resulting
product to the 56-bit B accumulator, rounds the result into the B1 portion of the accumu-
lator, and then zeros the B0 portion of the accumulator (X0 Y0+B=0.145227144519197
approximately
$00:1296CE:000000=0.145227193832397=B).
Condition Codes:
S — Computed according to the definition in A.5 CONDITION CODE COMPUTATION
L — Set if limiting (parallel move) or overflow has occurred in result
E — Set if the signed integer portion of A or B result is in use
U — Set if A or B result is unnormalized
N — Set if bit 55 of A or B result is set
Z— Set if A or B result equals zero
V — Set if overflow has occurred in A or B result
Note: The definitions of the E and U bits vary according to the scaling mode being used.
Refer to Section A.5 for complete details.
Instruction Format 1:
Opcode 1:
MOTOROLA
MACR
MACR
MACR
23
15
LF
( )S1,S2,D
( )S2,S1,D
DM
14
=$00:1296CD:9619C8,
13
T
Freescale Semiconductor, Inc.
DATA BUS MOVE FIELD
12
**
Signed Multiply-Accumulate and Round
For More Information On This Product,
MR
INSTRUCTION DESCRIPTIONS
S1
11
INSTRUCTION SET DETAILS
OPTIONAL EFFECTIVE ADDRESS EXTENSION
S0
10
Go to: www.freescale.com
I1
9
I0
8
which
S
7
8
L
6
7
1
is
E
5
Q
U
4
CCR
rounded
Q
N
3
Q
4
Z
2
3
d
V
1
to
MACR
k
C
0
the
1
0
1
A - 155
value

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