pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 100

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Figure 27
Note: DR = Dual-Rail interface
4.4.4
The received bit stream from pin XDI is optionally stored in the transmit elastic buffer.
The memory is organized as the receive elastic buffer. The functions are also equal to
the receive side. Programming of the transmit buffer size is done by SIC1.XBS1/0:
•
•
•
•
The functions of the transmit buffer are:
User’s Manual
Hardware Description
XBS1/0 = 00: Bypass of the transmit elastic buffer
XBS1/0 = 01: one frame buffer or 256 bits
Maximum of wander amplitude (peak-to-peak): 100 UI (1 UI = 488 ns)
average delay after performing a slip: 128 bits
XBS1/0 = 10: two frame buffer or 512 bits
Maximum of wander amplitude: 190 UI
average delay after performing a slip: 1 frame or 256 bits
XBS1/0 = 11: short buffer or 92 bits:
Maximum of wander amplitude: 18 µs
XL1/
XDOP/
XOID
XL2/
XDON
XCLK
TCLK
(E1: 8MHz)
(T1: 6MHz)
MCLK
average delay after performing a slip: 46 bits
DCO-X Digital Controlled Oscillator transmit
Transmit Elastic Buffer (E1)
Transmit Clock System (E1)
DR
DR
Clocking
Unit
D
Pulse Shaper
÷ 4
A
100
E1: 8MHz
T1: 6MHz
Attenuator
Transmit
DCO-X
Jitter
Framer
Functional Description E1
Transmit
Elastic
Store
DS1.1, 2003-10-23
PEF 2256 H/E
Internal Clock of
Receive System
Interface
SCLKR
FALC
SCLKX
TCLK
RCLK
ITS10305
XDI
®
56