pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 446

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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RSC
CRC6
PDEN
RPF
User’s Manual
Hardware Description
Received Signaling Information Changed
This interrupt bit is set during each multiframe in which signaling
information on at least one channel changes its value from the
previous multiframe. This interrupt only occurs in the synchronous
state. The registers RS(12:1) should be read within the next 3 ms
otherwise the contents is lost.
Receive CRC6 Error
0 =
1 =
Pulse-Density Violation
The pulse-density violation of the received data stream defined by
ANSI T1. 403 is violated. More than 14 consecutive zeros or less than
N ones in each and every time window of 8× (N+1) data bits (N = 23)
are detected. If GCR.SCI is set high this interrupt status bit is
activated with every change of state of FRS1.PDEN.
Receive Pool Full - HDLC Channel 1
32 bytes of a frame have arrived in the receive FIFO. The frame is not
yet received completely.
No CRC6 error occurs.
The CRC6 check of the last received multiframe failed.
446
DS1.1, 2003-10-23
T1/J1 Registers
PEF 2256 H/E
FALC
®
56

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