pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 147
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pef2256e
Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF2256E.pdf
(518 pages)
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5.2.5
Normally, this kind of multiframe structure only makes sense when using the CAS
robbed-bit signaling. The multiframe alignment signal is located at the FS-bit position of
every other frame (refer to
Table 35
Frame Number
1
2
3
4
5
6
7
8
9
10
11
12
There are two possibilities of remote alarm (yellow alarm) indication:
•
•
5.2.5.1
In the synchronous state terminal framing (FT-bits) and multiframing (FS-bits) are
observed, independently. Further reaction on framing errors depends on the selected
synchronization/resynchronization procedure (by bit FMR2.SSP):
•
User’s Manual
Hardware Description
Bit 2 = 0 in each time slot of a frame, selected with bit FMR0.SRAF = 0
The last bit of the multiframe alignment signal (bit 1 of frame 12) changes from "0" to
"1", selected with bit FMR0.SRAF = 1.
FMR2.SSP = 0: terminal frame and multiframe synchronization are combined.
Two errors within 4/5/6 framing bits (by bits FMR4.SSC1/0) of one of the above leads
to the asynchronous state for terminal framing and multiframing. Additionally to the
bit FRS0.LFA, loss of multiframe alignment is reported by bit FRS0.LMFA.
The resynchronization procedure starts with synchronizing upon the terminal
framing. If the pulse framing has been regained, the search for multiframe alignment
12-Frame Multiframe (D4 or SF Format, T1/J1)
Synchronization Procedure
12-Frame Multiframe Structure (T1/J1)
F
1
–
0
–
1
–
0
–
1
–
0
–
T
Table
35).
147
F
–
0
–
0
–
1
–
1
–
1
–
0
S
Functional Description T1/J1
Signaling Channel
Designation
A
B
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56
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