pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 380

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pef2256e

Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Idle Channel Register (Read/Write)
Value after reset: 00
ICB1
ICB2
ICB3
IC(24:1)
Line Interface Mode 0 (Read/Write)
Value after reset: 00
LIM0
XFB
User’s Manual
Hardware Description
IC17
XFB
IC1
IC9
7
7
Idle Channel Selection Bits
These bits define the channels (time slots) of the outgoing PCM frame
to be altered.
0 =
1 =
Transmit Full Bauded Mode
Only applicable for dual-rail mode (bit LIM1.DRS = 1).
0 =
1 =
Note: If CMI coding is selected (FMR0.XC(1:0) = 01) this bit has to
XDOS
IC10
IC18
IC2
H
H
, 00
Output signals XDOP/XDON are half bauded (normal
operation).
Output signals XDOP/XDON are full bauded.
overwritten by the idle channel code defined by register IDLE.
Normal operation.
Idle channel mode. The contents of the selected channel is
H
be cleared.
, 00
IC11
IC19
IC3
0
H
, 00
H
DCIM
IC12
IC20
IC4
380
IC13
IC21
IC5
1
IC14
IC22
RLM
IC6
IC15
IC23
IC7
LL
DS1.1, 2003-10-23
T1/J1 Registers
PEF 2256 H/E
IC16
IC24
MAS
IC8
0
0
FALC
(32)
(33)
(34)
(36)
®
56

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