pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 120
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pef2256e
Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF2256E.pdf
(518 pages)
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4.6.5
Each of the 32 time slots can be selected for loop-back from the system PCM input (XDI)
to the system PCM output (RDO). This loop-back is programmed for one time slot at a
time selected by register LOOP. During loop-back, an idle channel code programmed in
register IDLE is transmitted to the remote end in the corresponding PCM route time slot.
For the time slot test, sending sequences of test patterns like a 1-kHz check signal shall
be avoided. Otherwise an increased occurrence of slips in the tested time slot disturbs
testing. These slips do not influence the other time slots and the function of the receive
memory. The usage of a quasi-static test pattern is recommended.
Figure 43
User’s Manual
Hardware Description
RL1
RL2
XL1
XL2
Single Channel Loop-Back
Single Channel Loop-Back (E1)
Clock +
Data
Recovery
Trans.
Framer
RCLK
Rec.
Framer
MUX
120
IDLE Code
MUX
Functional Description E1
Elast.
Store
Elast.
Store
DS1.1, 2003-10-23
PEF 2256 H/E
ITS09747
FALC
RDO
XDI
®
56
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