pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 56

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

®
FALC
56
PEF 2256 H/E
Functional Description E1/T1/J1
3.3.2
Boundary Scan Interface
®
In the FALC
56 a Test Access Port (TAP) controller is implemented. The essential part
of the TAP is a finite state machine (16 states) controlling the different operational modes
of the boundary scan. Both, TAP controller and boundary scan, meet the requirements
given by the JTAG standard IEEE 1149.1.
Figure 9
gives an overview.
F0115
Figure 9
Block Diagram of Test Access Port and Boundary Scan
After switching on the device (power-on), a reset signal has to be applied to TRS, which
forces the TAP controller into test logic reset state.
For normal operation without boundary scan access, the boundary reset pin TRS can be
tied to the device reset pin RES.
If no boundary scan operation is used, TRS has to be connected to RST or V
. TMS,
SS
TCK and TDI do not need to be connected since pullup transistors ensure high input
levels in this case.
User’s Manual
56
DS1.1, 2003-10-23
Hardware Description