AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 146

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AMD-K6-2E/400AFR

Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
AMD-K6™-2E Processor Data Sheet
5.53
Pin Attribute
Pin Location
Summary
Driven and Floated
128
W/R# (Write/Read)
Output
AM-06
The processor drives W/R# to indicate whether it is performing
a write or a read cycle on the bus. In addition, W/R# is used to
define other bus cycles, including interrupt acknowledge and
special cycles. See Table 23 on page 132 for more details.
W/R# is driven off the same clock edge as ADS# and remains in
the same state until the clock edge on which NA# or the last
expected BRDY# of the cycle is sampled asserted. W/R# is
driven during memory cycles, I/O cycles, special bus cycles, and
interrupt acknowledge cycles.
W/R# is floated off the clock edge on which BOFF# is sampled
asserted and off the clock edge on which the processor asserts
HLDA in response to HOLD.
Preliminary Information
Signal Descriptions
22529B/0—January 2000
Chapter 5

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