AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 201

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
7.4
Chapter 7
State of Processor After INIT
The recognition of the assertion of INIT causes the processor to
empty its pipelines, to initialize most of its internal state, and to
branch to address FFFF_FFF0h—the same instruction
execution starting point used after RESET.
Unlike RESET, the processor preserves the contents of its
caches, the floating-point state, the MMX and 3DNow! states,
MSRs, and the CD and NW bits of the CR0 register.
The edge-sensitive interrupts FLUSH# and SMI# are sampled
and preserved during the INIT process and are handled
accordingly after the initialization is complete. However, the
processor resets any pending NMI interrupt upon sampling
INIT asserted.
INIT can be used as an accelerator for 80286 code that requires
a reset to exit from protected mode back to real mode.
Power-On Configuration and Initialization
AMD-K6™-2E Processor Data Sheet
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