AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 38

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AMD-K6-2E/400AFR

Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
AMD-K6™-2E Processor Data Sheet
Figure 6. Register X and Y Functional Units
2.6
20
Integer X
ALU
Branch-Prediction Logic
MMXÉ
ALU
The branch condition unit is separate from the branch
prediction logic in that it resolves conditional branches such as
JCC and LOOP after the branch condition has been evaluated.
Sophisticated branch logic that can minimize or hide the impact
of changes in program flow is designed into the AMD-K6-2E
processor. Branches in x86 code fit into two categories:
Register X
Execution
Issue Bus
Pipeline
for the
Unconditional branches always change program flow (that is,
the branches are always taken)
Conditional branches may or may not divert program flow
(that is, the branches are taken or not-taken). When a
conditional branch is not taken, the processor simply
continues decoding and executing the next instructions in
memory.
3DNow!É
Multiplier
MMX/
Preliminary Information
(24 RISC86
Internal Architecture
Scheduler
Shifter
MMX
Buffer
®
Operations)
3DNow!
ALU
Register Y
Execution
Issue Bus
Pipeline
for the
MMX
ALU
22529B/0—January 2000
Integer Y
ALU
Chapter 2

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