AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 253

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
TAP Instructions
Table 47. Supported Test Access Port (TAP) Instructions
Notes:
1. Following the execution of the EXTEST instruction, the processor must be reset to return to normal, non-test operation.
2. These instruction encodings are undefined on the AMD-K6-2E processor and default to the BYPASS instruction.
3. Because the TDI input contains an internal pullup, the BYPASS instruction is executed if the TDI input is not connected or open
Chapter 12
SAMPLE / PRELOAD
during an instruction scan operation. The BYPASS instruction does not affect the normal operational state of the processor.
Instruction
BYPASS
BYPASS
EXTEST
IDCODE
HIGHZ
1
2
3
00100b–11110b
Encoding
00000b
00001b
00010b
00011b
11111b
Bypass Register (BR). The BR is a Test Data register consisting of a
1-bit shift register that provides the shortest path between TDI
and TDO. When the processor is not involved in a test
operation, the BR can be selected by an instruction to allow the
transfer of test data through the processor without having to
serially scan the test data through the BSR. This functionality
preserves the state of the BSR and significantly reduces test
time.
The BR register is selected by the BYPASS and HIGHZ
instructions as well as by any instructions not supported by the
AMD-K6-2E processor.
The processor supports the three instructions required by the
IEEE 1149.1 standard — EXTEST, SAMPLE/PRELOAD, and
BYPASS — as well as two additional optional instructions —
IDCODE and HIGHZ.
Table 47 shows the complete set of TAP instructions supported
by the processor along with the 5-bit Instruction Register
encoding and the register selected by each instruction.
EXTEST Instruction. When the EXTEST instruction is executed,
the processor loads the BSR shift register with the current state
of the input and bidirectional pins in the Capture-DR state and
drives the output and bidirectional pins with the corresponding
values from the BSR output register in the Update-DR state.
Register
BSR
BSR
DIR
Test and Debug
BR
BR
BR
Description
Sample inputs and drive outputs
Sample inputs and outputs, then load the BSR
Read DIR
Float outputs and bidirectional pins
Undefined instruction, execute the BYPASS instruction
Connect TDI to TDO to bypass the BSR
AMD-K6™-2E Processor Data Sheet
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