AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 67

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AMD-K6-2E/400AFR

Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
22529B/0—January 2000
3.4
Figure 42. 4-Kbyte Paging Mechanism
Chapter 3
31
CR3
Page Directory
Paging
Offset
The AMD-K6-2E processor can physically address up to four
Gbytes of memory. This memory can be segmented into pages.
The size of these pages is determined by the operating system
design and the values set up in the page directory entries (PDE)
and page table entries (PTE).
The processor can access both 4-Kbyte pages and 4-Mbyte
pages, and the page sizes can be intermixed within a page
directory. When the page size extension (PSE) bit in CR4 is set,
the processor translates linear addresses using either the
4-Kbyte translation lookaside buffer (TLB) or the 4-Mbyte TLB,
depending on the state of the page size (PS) bit in the page
directory entry. Figures 42 and 43 show how 4-Kbyte and
4-Mbyte page translations work.
Directory
Page
PDE
22
21
Software Environment
Page Table
Linear Address
Offset
Table
Page
PTE
12
11
AMD-K6™-2E Processor Data Sheet
Offset
Page
Physical
Address
4-Kbyte
Frame
Page
0
49

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