AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 64

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6™-2E Processor Data Sheet
Page Flush/Invalidate
Register (PFIR)
Figure 39. Page Flush/Invalidate Register (PFIR)
46
Symbol
63
Reserved
LINPAGE
PF
F/I
20-bit Linear Page Address
Page Fault Occurred
Flush/Invalidate Command
Description
The AMD-K6-2E processor contains the Page Flush/Invalidate
Register (PFIR) (see Figure 39) that allows cache invalidation
and optional flushing of a specific 4-Kbyte page from the linear
address space. Using this register can result in a much lower
cycle count for flushing particular pages versus flushing the
entire cache. When the PFIR is written to (using the WRMSR
instruction), the invalidation and, optionally, the flushing
begins.
Bit
31-12
8
0
Preliminary Information
Software Environment
32
31
LINPAGE
12
11
9 8 7
P
F
22529B/0—January 2000
1 0
Chapter 3
F
/
I