AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 75

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AMD-K6-2E/400AFR

Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
22529B/0—January 2000
Opcode Bytes
ModR/M Byte
Decode Type
RISC86 Operation
Table 12. Integer Instructions
Chapter 3
Instruction Mnemonic
AAA
AAD
AAM
AAS
ADC mreg8, reg8
ADC mem8, reg8
ADC mreg16/32, reg16/32
ADC mem16/32, reg16/32
ADC reg8, mreg8
ADC reg8, mem8
The second and third columns list all applicable opcode bytes.
The fourth column lists the modR/M byte when used by the
instruction. The modR/M byte defines the instruction as a
register or memory form. If modR/M bits 7 and 6 are documented
as mm (memory form), mm can only be 10b, 01b or 00b.
The fifth column lists the type of instruction decode — short,
long, and vector. The AMD-K6-2E processor decode logic can
process two short, one long, or one vector decode per clock.
The sixth column lists the type of RISC86 operation(s) required
for the instruction. The operation types and corresponding
execution units are as follows:
reg16/32—word or doubleword integer register defined by
instruction byte(s) or bits 5, 4, and 3 of the modR/M byte
alu—either of the integer execution units
alux—integer X execution unit only
branch—branch condition unit
float—floating-point execution unit
limm—load immediate, instruction control unit
load, fload, mload—load unit
meu—Multimedia execution units for MMX and 3DNow!
instructions
store, fstore, mstore—store unit
Software Environment
First
Byte
D5h
D4h
37h
3Fh
10h
10h
11h
11h
12h
12h
Second
Byte
0Ah
0Ah
mm-xxx-xxx
mm-xxx-xxx
mm-xxx-xxx
ModR/M
11-xxx-xxx
11-xxx-xxx
11-xxx-xxx
Byte
AMD-K6™-2E Processor Data Sheet
Decode
vector
vector
vector
vector
vector
vector
vector
vector
vector
vector
Type
RISC86
Operations
57

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