AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 174

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AMD-K6-2E/400AFR

Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
AMD-K6™-2E Processor Data Sheet
AHOLD-Initiated
Inquire Hit to Shared
or Exclusive Line
156
In Figure 62, the processor asserts HIT# and negates HITM# off
the clock edge after the clock edge on which EADS# is sampled
asserted, indicating the current inquire cycle hits either a
shared or exclusive line. (HIT# is driven in the same state until
the next inquire cycle.) The processor samples INV asserted
during the inquire cycle and transitions the line to the Invalid
state regardless of its previous state.
During an AHOLD-initiated inquire cycle, the processor
samples AHOLD on every clock edge until it is negated. In
Figure 62, the processor asserts ADS# off the same clock on
which AHOLD is sampled negated. If the inquire cycle hits a
modified line, the processor performs a writeback cycle before
it drives a new bus cycle. The next section describes the
AHOLD-initiated inquire cycle that hits a modified line.
Preliminary Information
Bus Cycles
22529B/0—January 2000
Chapter 6

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