AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 269

• Manufacturer Part Number: AMD-K6-2E/400AFR
• Manufacturer: AMD [Advanced Micro Devices]

22529B/0—January 2000
13.4
Enter Stop Grant
Inquire State
Exit Stop Grant
Inquire State
Chapter 13
Stop Grant Inquire State
Normal state, a minimum of one instruction is executed prior to
re-entering the Stop Grant state.
If INIT, INTR (if interrupts are enabled), FLUSH#, NMI, or
SMI# are sampled asserted in the Stop Grant state, the
processor latches the edge-sensitive signals (INIT, FLUSH#,
NMI, and SMI#), but otherwise does not exit the Stop Grant
state to service the interrupt. When the processor returns to the
Normal state due to sampling STPCLK# negated, any pending
interrupts are recognized after returning to the Normal state.
To ensure their recognition, all of the normal requirements for
these input signals apply within the Stop Grant state.
If RESET is sampled asserted in the Stop Grant state, the
processor immediately returns to the Normal state and the
reset process begins.
The Stop Grant Inquire state is entered from the Stop Grant
state or the Halt state when EADS# is sampled asserted during
an inquire cycle initiated by the system logic. The AMD-K6-2E
processor responds to an inquire cycle in the same manner as in
the Normal state by driving HIT# and HITM#. If the inquire
cycle hits a modified data cache line, the processor performs a
writeback cycle.
Following the completion of any writeback, the processor
returns to the state from which it entered the Stop Grant
Inquire state.
Clock Control
AMD-K6™-2E Processor Data Sheet
251