AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 167
AMD-K6-2E/400AFR
Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-K6-2E400AFR.pdf
(332 pages)
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22529B/0—January 2000
Figure 58. Basic HOLD/HLDA Operation
Chapter 6
BE[7:0]#
A[31:3]
D[63:0]
BRDY#
M/IO#
HOLD
ADS#
HLDA
W/R#
D/C#
CLK
HOLD on every clock edge but does not assert HLDA until any
in-progress cycle or sequence of locked cycles is completed.
When the processor samples HOLD negated during a hold
acknowledge cycle, it negates HLDA off the next clock edge.
The processor regains control of the bus and can assert ADS#
off the same clock edge on which HLDA is negated.
Bus Cycles
AMD-K6™-2E Processor Data Sheet
149
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