AMD-K6-2E/400AFR AMD [Advanced Micro Devices], AMD-K6-2E/400AFR Datasheet - Page 216

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AMD-K6-2E/400AFR

Manufacturer Part Number
AMD-K6-2E/400AFR
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
AMD-K6™-2E Processor Data Sheet
8.9
Table 34. Data Cache States for Read and Write Accesses
Notes:
1. Single read, single write, cache update, and writethrough = 1 to 8 bytes. Line fill = 32-byte burst read.
2. The final MESI state assumes that the state of the WB/WT# signal remains the same for all accesses to a particular cache line.
3. If CACHE# is driven Low and KEN# is sampled asserted.
4. If PWT is driven Low and WB/WT# is sampled High, the line is cached in the exclusive (writeback) state. If PWT is driven High or
5. Assumes the write allocate conditions as specified in “Write Allocate” on page 192 are not met.
6. Assumes the write allocate conditions as specified in “Write Allocate” on page 192 are met.
7. Assumes PWT is driven Low and WB/WT# is sampled High.
8. Assumes PWT is driven High or WB/WT # is sampled Low.
198
Cache
Cache
Write
Read
WB/WT# is sampled Low, the line is cached in the shared (writethrough) state.
Type
Write miss
Read miss
Write hit
Read hit
Cache States
Cache State Before
Access
Invalid
Invalid
Exclusive
Modified
Shared
Invalid
Invalid
Invalid
Exclusive or modified
Shared
Table 34 shows all the possible cache-line states before and
after program-generated accesses to individual cache lines. The
table includes the correspondence between MESI states and
Writethrough or Writeback states for lines in the data cache.
Preliminary Information
Cache Organization
Access Type
Single read from bus
Burst read from bus, fill
cache
Not applicable or none
Not applicable or none
Not applicable or none
Single write to bus
Burst read from bus, fill
cache, write to cache
Burst read from bus, fill
cache, write to cache,
single write to bus
Write to cache
Write to cache, single write
to bus
3
1
6
5
6
MESI State
Modified
Shared
Invalid
Shared or
exclusive
Exclusive
Shared
Invalid
Modified
Modified
Shared or
exclusive
8
4
7
4
Cache State After Access
2
Writeback
Writeback/
Writethrough State
Not applicable or none
Writethrough or writeback
Writeback
Writethrough
Not applicable or none
Not applicable or none
Not applicable or none
Writeback
Writethrough or writeback
22529B/0—January 2000
Chapter 8
4
4

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