HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 100

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 5 Exception Handling
Note:
Table 5.4
Notes: 1. VBR: Vector base register
Rev. 6.00 Jun. 12, 2007 Page 68 of 610
REJ09B0131-0600
Exception Handling Source
Trap instruction (user vector)
Interrupt
On-chip peripheral module*
Exception Source
Resets
Address errors, interrupts,
instructions
*
2. Vector table address offset: See table 5.3.
3. Vector number: See table 5.3.
For details on the vector numbers and vector table address offsets of on-chip peripheral
module interrupts, see table 6.2, Interrupt Exception Handling Vectors and Priorities in
section 6, Interrupt Controller (INTC).
Calculating Exception Handling Vector Table Addresses
IRQ0
IRQ1
IRQ2
IRQ3
(Reserved by system)
IRQ4
IRQ5
IRQ6
IRQ7
Vector Table Address Calculation
Vector table address = H'A0000000
Vector table address = VBR + (vector table address offset)
Vector Number
32
63
64
65
66
67
68
79
80
81
82
83
84
255
:
:
:
= H'A0000000
= VBR + (vector number)
Vector Table Address Offset
H'00000080 to H'00000083
H'00000144 to H'00000147
H'00000148 to H'0000014B
H'0000014C to H'0000014F
H'000000FC to H'000000FF
H'00000100 to H'00000103
H'00000104 to H'00000107
H'00000108 to H'0000010B
H'0000010C to H'0000010F
H'00000110 to H'00000113
H'0000013C to H'0000013F
H'00000140 to H'00000143
H'00000120 to H'00000124
H'000003FC to H'000003FF
(vector table address offset)
(vector number)
4
:
:
:
4