HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 162

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 Bus State Controller (BSC)
SDRAM:
• CS3WCR
Rev. 6.00 Jun. 12, 2007 Page 130 of 610
REJ09B0131-0600
Bit
31 to 15
14
13
12
11
10
Bit Name

WTRP1
WTRP0

WTRCD1
WTRCD0
Initial
Value
All 0
0
0
0
0
1
R/W
R
R/W
R/W
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Wait Cycle Number for Precharge Completion
Specify the number of minimum wait cycles inserted to
wait for the completion of precharge in the following
cases.
•
•
•
•
Reserved
This bit is always read as 0. The write value should
always be 0.
Wait Cycle Number from ACTV Command to
READ(A)/WRIT(A) Command
Specify the number of minimum wait cycles from issuing
the ACTV command to issuing the READ(A)/WRIT(A)
command.
00: 0 cycle (no wait cycle)
01: 1 cycle
10: 2 cycles
11: 3 cycles
From the start of auto-precharge to the issuing of the
ACTV command for the same bank.
From the issuing of the PRE/PALL command to the
issuing of the ACTV command for the same bank.
From the issuing of the PALL command during
auto-refreshing to the issuing of the REF command.
From the issuing of the PALL command during
self-refreshing to the issuing of the SELF command.
00: 0 cycle (no wait cycle)
01: 1 cycle
10: 2 cycles
11: 3 cycles