HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 169

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.4.5
RTCSR specifies various items about refresh for SDRAM.
When RTCSR is written to, the upper 16 bits of the write data must be H'A55A to cancel write
protection.
Bit
4
3
2
1
0
Bit
31 to 8
Refresh Timer Control/Status Register (RTCSR)
Bit Name
A3ROW1
A3ROW0

A3COL1
A3COL0
Bit Name

Initial
Value
0
0
0
0
0
Initial
Value
All 0
R/W
R/W
R/W
R
R/W
R/W
R/W
R
Description
Number of Bits of Row Address for Area 3
Specify the number of bits of the row address for area 3.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
Reserved
This bit is always read as 0. The write value should
always be 0.
Number of Bits of Column Address for Area 3
Specify the number of bits of the column address for
area 3.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 6.00 Jun. 12, 2007 Page 137 of 610
Section 7 Bus State Controller (BSC)
REJ09B0131-0600