HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 85

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

3.2.2
CCR3 specifies the cache size. Programs that change the contents of CCR3 should be placed in the
address space that is not cached.
Note: Supported only by the SH7618.
Bit
0
Bit
31 to 17
16
15
14
13 to 0
Cache Control Register 3 (CCR3)
Bit Name
CE
Bit Name
—
CSIZE2
CSIZE1
CSIZE0
—
Initial
Value
0
Initial
Value
All 0
0
0
1
All 0
R/W
R/W
R/W
R
R/W
R/W
R/W
R
Description
Cache Enable
Indicates whether or not the cache function is used.
0: Cache function is not used.
1: Cache function is used.
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Cache Size
Writing B'100 to these bits specifies the cache size
16 kbytes. Write B'100 before enabling the cache by
the CE bit in CCR1.
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 6.00 Jun. 12, 2007 Page 53 of 610
REJ09B0131-0600
Section 3 Cache