HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 53
HD6417618
Manufacturer Part Number
HD6417618
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417618.pdf
(646 pages)
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Part Number:
HD6417618RBGN100V
Manufacturer:
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20 000
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2.2.1
There are sixteen 32-bit general registers (Rn), designated R0 to R15. The general registers are
used for data processing and address calculation. R0 is also used as an index register. With a
number of instructions, R0 is the only register that can be used. R15 is used as a hardware stack
pointer (SP). In exception handling, R15 is used for accessing the stack to save or restore the
status register (SR) and program counter (PC) values.
2.2.2
There are three 32-bit control registers, designated status register (SR), global base register (GBR),
and vector base register (VBR). SR indicates a processing state. GBR is used as a base address in
GBR indirect addressing mode for data transfer of on-chip peripheral module registers. VBR is
used as a base address of the exception handling (including interrupts) vector table.
• Status register (SR)
Bit
31 to 10
9
8
7
6
5
4
3, 2
1
General Registers (Rn)
Control Registers
Bit
name
M
Q
I3
I2
I1
I0
S
Default
All 0
Undefined
Undefined
1
1
1
1
All 0
Undefined
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Used by the DIV0U, DIV0S, and DIV1 instructions.
Used by the DIV0U, DIV0S, and DIV1 instructions.
Interrupt Mask
Reserved
These bits are always read as 0. The write value
should always be 0.
S
Used by the multiply and accumulate instruction.
Rev. 6.00 Jun. 12, 2007 Page 21 of 610
REJ09B0131-0600
Section 2 CPU
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