HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 396

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 14 Serial Communication Interface with FIFO (SCIF)
14.4.2
In asynchronous mode, each transmitted or received character begins with a start bit and ends with
a stop bit. Serial communication is synchronized one character at a time.
The transmitting and receiving sections of the SCIF are independent, so full duplex
communication is possible. The transmitter and receiver are 16-byte FIFO buffered, so data can be
written and read while transmitting and receiving are in progress, enabling continuous transmitting
and receiving.
Figure 14.2 shows the general format of asynchronous serial communication. In asynchronous
serial communication, the communication line is normally held in the mark (high) state. The SCIF
monitors the line and starts serial communication when the line goes to the space (low) state,
indicating a start bit. One serial character consists of a start bit (low), data (LSB first), parity bit
(high or low), and stop bit (high), in that order.
When receiving in asynchronous mode, the SCIF synchronizes at the falling edge of the start bit.
The SCIF samples each data bit on the eighth pulse of a clock with a frequency 16 times the bit
rate. Receive data is latched at the center of each bit.
Rev. 6.00 Jun. 12, 2007 Page 364 of 610
REJ09B0131-0600
Serial
data
Operation in Asynchronous Mode
Figure 14.2 Example of Data Format in Asynchronous Communication
1
Start
bit
1 bit
0
LSB
D0
(8-Bit Data with Parity and Two Stop Bits)
One unit of transfer data (character or frame)
D1
D2
Transmit/receive data
D3
7 or 8 bits
D4
D5
D6
MSB
D7
Parity
bit
1 bit or
none
0/1
Stop bit
1
1 or 2 bits
1
(mark state)
Idle state
1