HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 254
HD6417618
Manufacturer Part Number
HD6417618
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417618.pdf
(646 pages)
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Section 10 Power-Down Modes
10.4
10.4.1
Executing the SLEEP instruction when the STBY bit in STBCR is 0 causes a transition from the
program execution state to sleep mode. Although the CPU halts immediately after executing the
SLEEP instruction, the contents of its internal registers remain unchanged. The on-chip peripheral
modules continue to operate in sleep mode and the clock continues to be output to the CKIO pin.
10.4.2
Sleep mode is canceled by an interrupt other than a user break (NMI, H-UDI, IRQ, and on-chip
peripheral module) or a reset.
Canceling with Interrupt: When a user-break, NMI, H-UDI, IRQ, or on-chip peripheral module
interrupt occurs, sleep mode is canceled and interrupt exception handling is executed. When the
priority level of an IRQ or on-chip peripheral module interrupt is lower than the interrupt mask
level set in the status register (SR) of the CPU, an interrupt request is not accepted preventing
sleep mode from being canceled.
Canceling with Reset: Sleep mode is canceled by a power-on reset or an H-UDI reset.
Rev. 6.00 Jun. 12, 2007 Page 222 of 610
REJ09B0131-0600
Sleep Mode
Transition to Sleep Mode
Canceling Sleep Mode
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