HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 265
HD6417618
Manufacturer Part Number
HD6417618
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417618.pdf
(646 pages)
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Part Number:
HD6417618RBGN100V
Manufacturer:
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Bit
16
15 to 13
12
11, 10
9
8, 7
6
Bit Name
TXF
PRCEF
MPDE
RE
Initial
Value
0
All 0
0
All 0
0
All 0
0
R/W
R/W
R
R/W
R
R/W
R
R/W
Description
Transmit Flow Control Operating mode
0: Transmit flow control function is disabled
1: Transmit flow control function is enabled
Reserved
These bits are always read as 0. The write value
should always be 0.
Permit Receive CRC Error Frame
0: A frame with a CRC error is received as a frame
1: A frame with a CRC error is received as a frame
For a frame with an error, a CRC error is reflected in
ECSR of the E-DMAC and the status of the receive
descriptor. For a frame without an error, the frame is
received as normal frame.
Reserved
These bits are always read as 0. The write value
should always be 0.
Magic Packet Detection Enable
Enables or disables Magic Packet detection by
hardware to allow activation from the Ethernet.
0: Magic Packet detection is not enabled
1: Magic Packet detection is enabled
Reserved
These bits are always read as 0. The write value
should always be 0.
Reception Enable
If a frame is being received when this bit is switched
from receive function enabled (RE = 1) to disabled
(RE = 0), the receive function will be enabled until
reception of the corresponding frame is completed.
0: Receive function is disabled
1: Receive function is enabled
with an error.
without an error.
Rev. 6.00 Jun. 12, 2007 Page 233 of 610
Section 11 Ethernet Controller (EtherC)
REJ09B0131-0600
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