HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 324

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)
1. TFP = 00 or 01 (frame continuation):
2. TFP = 01 or 11 (frame end):
The E-DMAC continues reading descriptors and transmitting frames as long as the setting of the
TACT bit in the read descriptors is "active." When a descriptor with an "inactive" TACT bit is
read, the E-DMAC resets the transmit request bit (TR) in the transmit register and ends transmit
processing (EDTRR).
Rev. 6.00 Jun. 12, 2007 Page 292 of 610
REJ09B0131-0600
Transmission flowchart
This LSI + memory
Descriptor write-back is performed after DMA transfer.
Descriptor write-back is performed after completion of frame transmission.
EtherC/E-DMAC
Descriptor and
buffer setting
initialization
transmit
Transmit data transfer
Transmit data transfer
Transmit directive
Descriptor write-back
Descriptor write-back
Descriptor read
Descriptor read
Figure 12.4 Sample Transmission Flowchart
E-DMAC
Transmission
completed
Transmit FIFO
EtherC
Frame transmission
PHY