HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 393

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.3.12 Line Status Register (SCLSR)
SCLSR is a 16-bit readable/writable register which can always be read from and written to by the
CPU. However, a 1 cannot be written to the ORER flag. This flag can be cleared to 0 only if it has
first been read (after being set to 1). SCLSR is initialized to H'0000 by a power-on reset.
Note: *
Bit
15 to 1
0
The only value that can be written is 0 to clear the flag.
Bit Name

ORER
Initial
value
All 0
0
R/W
R
R/(W)* Overrun Error
Section 14 Serial Communication Interface with FIFO (SCIF)
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Indicates the occurrence of an overrun error.
0: Receiving is in progress or has ended normally *
[Clearing conditions]
•
•
1: An overrun error has occurred *
[Setting condition]
•
Notes: 1. Clearing the RE bit to 0 in SCSCR does
ORER is cleared to 0 when the chip is a power-on
reset
ORER is cleared to 0 when 0 is written after 1 is
read from ORER.
ORER is set to 1 when the next serial receiving is
finished while receive FIFO data are full.
2. The receive FIFO data register (SCFRDR)
not affect the ORER bit, which retains its
previous value.
hold the data before an overrun error is
occurred, and the next receive data is
extinguished. When ORER is set to 1,
SCIF can not continue the next serial
receiving.
Rev. 6.00 Jun. 12, 2007 Page 361 of 610
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REJ09B0131-0600
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