MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 258
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MMC2114
Manufacturer Part Number
MMC2114
Description
M CORE Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MMC2114.pdf
(654 pages)
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Clock Module
11.8 Functional Description
11.8.1 System Clock Modes
Advance Information
258
CAUTION:
This subsection provides a functional description of the clock module.
The system clock source is determined during reset (see
Configuration During
reset and is of no importance after reset is negated. If PLLEN is changed
during a reset other than power-on reset, the internal clocks may glitch
as the clock source is changed between external clock mode and PLL
clock mode. Whenever PLLEN is changed in reset, an immediate loss of
lock condition occurs.
Table 11-6
relationships for the possible clock modes.
XTAL must be tied low in external clock mode when reset is asserted. If
it is not, clocks could be suspended indefinitely.
The external clock is divided by two internally to produce the system
clocks.
1. f
Normal PLL clock mode
1:1 PLL clock mode
External clock mode
Freescale Semiconductor, Inc.
f
MFD ranges from 0 to 7.
RFD ranges from 0 to 7.
ref
sys
For More Information On This Product,
= input reference frequency
= CLKOUT frequency
Table 11-6. Clock-Out and Clock-In Relationships
Clock Mode
shows the clock-out frequency to clock-in frequency
Go to: www.freescale.com
Clock Module
Reset). The value of PLLEN is latched during
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
f
f
f
Ã
sys
sys
sys
= f
= f
= f
ref
ref
ref
/2
(MFD + 2)/2
PLL Options
RFD
(1)
Table 4-7.
MOTOROLA
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