MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 469

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

19.8.8.2 Left-Justified Signed Result Register (LJSRR)
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Address: 0x00ca_0300 through 0x00ca_037e
Reset:
Reset:
Read:
Read:
Write:
Write:
S — Sign Bit
RESULT[14:6] — Result Field
Figure 19-16. Left-Justified Signed Result Register (LJSRR)
The left justified, signed format corresponds to a half-scale, offset
binary, two’s complement data format. Conversion values
corresponding to 1/2 full scale, 0x0200, or higher are interpreted as
positive values and have a sign bit of 0. An unsigned, right justified
conversion of 0x0200 would be represented as 0x0000 in this signed
register, where the sign = 0 and the result = 0. For an unsigned, right
justified conversion of 0x3FF (full range or V
equivalent in this register would be 0x7FC0, sign = 0 and
result = 0x1FF. For an unsigned, right justified conversion of 0x0000
(V
and result = 0x000, a two’s complement value representing –512.
The conversion result is signed, left-justified data.
Freescale Semiconductor, Inc.
RL
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Bit 15
Bit 7
), the signed equivalent in this register would be 0x8000, sign = 1
S
RESULT
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= Writes have no effect and the access terminates without a transfer error exception.
14
6
13
5
0
0
12
4
0
0
Queued Analog-to-Digital Converter (QADC)
RESULT
11
3
0
0
RH
10
), the signed
2
0
0
Register Descriptions
Advance Information
9
1
0
0
Bit 8
Bit 0
0
0
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