MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 367

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
NOTE:
Serial Communications Interface Modules (SCI1 and SCI2)
RDRF — Receive Data Register Full Flag
IDLE — Idle Line Flag
When RWU of SCICR2 =1, an idle line condition does not set the IDLE
flag.
OR — Overrun Flag
The RDRF flag is set when the data in the receive shift register is
transferred to SCIDRH and SCIDRL. It signals that the received data
is available to the MCU. If the RIE bit is set in SCICR2, RDRF
generates an interrupt request. Clear RDRF by reading the SCISR1
and then reading SCIDRL. Reset clears RDRF.
The IDLE flag is set when 10 (if M = 0) or 11 (if M = 1) consecutive
logic 1s appear on the receiver input. If the ILIE bit in SCICR2 is set,
IDLE generates an interrupt request. Once IDLE is cleared, a valid
frame must again set the RDRF flag before an idle condition can set
the IDLE flag. Clear IDLE by reading SCISR1 and then reading
SCIDRL. Reset clears IDLE.
The OR flag is set if data is not read from SCIDRL before the receive
shift register receives the stop bit of the next frame. This is a receiver
overrun condition. If the RIE bit in SCICR2 is set, OR generates an
interrupt request. The data in the shift register is lost, but the data
already in the SCIDRH and SCIDRL is not affected. Clear OR by
reading SCISR1 and then reading SCIDRL. Reset clears OR.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Received data available in SCIDRH and SCIDRL
0 = Received data not available in SCIDRH and SCIDRL
1 = Receiver idle
0 = Receiver active or idle since reset or idle since IDLE flag last
1 = Overrun
0 = No overrun
cleared
Go to: www.freescale.com
Serial Communications Interface Modules (SCI1 and SCI2)
Memory Map and Registers
Advance Information
367