MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 451

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
RESUME — Queue 2 Resume Bit
BQ2[6:0] — Beginning of Queue 2 Field
RESUME selects the resumption point for queue 2 after its operation
is suspended due to a queue 1 trigger event. If RESUME is changed
during the execution of queue 2, the change is not recognized until an
end-of-queue condition is reached or the operating mode of queue 2
is changed.
The primary reason for selecting re-execution of the entire queue or
subqueue is to guarantee that all samples are taken consecutively in
one scan (coherency).
When subqueues are not used, queue 2 execution restarts after
suspension with the first CCW in queue 2. When a pause has
previously occurred in queue 2 execution, queue execution restarts
after suspension with the first CCW in the current subqueue.
A subqueue is considered to be a stand-alone sequence of
conversions. Once a pause flag has been set to report subqueue
completion, that subqueue is not repeated until all CCWs in queue 2
are executed.
An example of using the RESUME bit is when the frequency of
queue 1 trigger events prohibit queue 2 completion. If the rate of
queue 1 execution is too high, it is best for queue 2 execution to
continue with the CCW that was being converted when queue 2 was
suspended. This allows queue 2 to eventually complete execution.
BQ2[6:0] denotes the CCW location where queue 2 begins. This
allows the length of queue 1 and queue 2 to vary. The BQ2 field also
serves as an end-of-queue condition for queue 1.
The beginning of queue 2 is defined by programming the BQ2 field in
QACR2. BQ2 is usually set before or at the same time as the queue
operating mode for queue 2 is selected. If BQ2[6:0] 64, queue 2 has
no entries, the entire CCW table is dedicated to queue 1, and CCW63
is the end-of-queue 1. If BQ2[6:0] is 0, the entire CCW table is
dedicated to queue 2. A special case occurs when an operating mode
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
1 = After suspension, begin execution with the aborted CCW in
0 = After suspension, begin execution with the first CCW of
queue 2.
queue 2 or the current subqueue of queue 2.
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Queued Analog-to-Digital Converter (QADC)
Register Descriptions
Advance Information
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