MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 443

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
TRG — Trigger Assignment Bit
QPR[6:0] — Prescaler Clock Divider Bits
The TRG bit determines the queue assignment of the ETRIG[2:1]
pins.
The read/write QPR[6:0] bits select the system clock divisor to
generate the QADC clock as
clock rate can be given as:
where:
If QPR[6:0] = 0, then the QPR register field value is read as a 1 and
the prescaler divisor is 2.
The prescaler should be selected so that the QADC clock rate is
within the required fQCLK range. See
Conversion Specifications
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
1 <= QPR[6:0] <= 127.
1 = ETRIG1 triggers queue 2; ETRIG2 triggers queue 1.
0 = ETRIG1 triggers queue 1; ETRIG2 triggers queue 2.
Go to: www.freescale.com
f
QCLK
=
Table 19-3
(Operating).
QPR[6:0] + 1
Queued Analog-to-Digital Converter (QADC)
f
SYS
Table 23-8. QADC
shows. The resulting QADC
Register Descriptions
Advance Information
443