MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 507

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
The queue can be scanned in single pass or continuous fashion. When
a single-scan mode is selected, the scan must be engaged by setting the
single-scan enable bit. When a continuous-scan mode is selected, the
queue remains active in the selected queue operating mode after the
QADC completes each queue scan sequence.
During queue execution, the QADC reads each CCW from the active
queue and executes conversions in three stages:
During initial sample, a buffered version of the selected input channel is
connected to the sample capacitor at the input of the sample buffer
amplifier.
During the final sample period, the sample buffer amplifier is bypassed,
and the multiplexer input charges the sample capacitor directly. Each
CCW specifies a final input sample time of 2, 4, 8, or 16 QCLK cycles.
When an analog-to-digital conversion is complete, the result is written to
the corresponding location in the result word table. The QADC continues
to sequentially execute each CCW in the queue until the end of the
queue is detected or a pause bit is found in a CCW.
When the pause bit is set in the current CCW, the QADC stops execution
of the queue until a new trigger event occurs. The pause status flag bit
is set, and an interrupt may optionally be requested. After the trigger
event occurs, the paused state ends, and the QADC continues to
execute each CCW in the queue until another pause is encountered or
the end of the queue is detected.
An end-of-queue condition occurs when:
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Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Initial sample
Final sample
Resolution
The CCW channel field is programmed with 63 to specify the end
of the queue.
The end-of-queue 1 is implied by the beginning of queue 2, which
is specified by the BQ2 field in QACR2.
The physical end of the queue RAM space defines the end of
either queue.
Go to: www.freescale.com
Queued Analog-to-Digital Converter (QADC)
Advance Information
Digital Control
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