MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 563

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

22.3 Top-Level Test Access Port (TAP)
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
CAUTION:
These devices provide a dedicated user-accessible test access port
(TAP) that is fully compatible with the IEEE 1149.1 Standard Test
Access Port and Boundary-Scan Architecture. Problems associated with
testing high-density circuit boards have led to development of this
proposed standard under the sponsorship of the Test Technology
Committee of IEEE and the Joint Test Action Group (JTAG). The
implementation supports circuit-board test strategies based on this
standard.
The top-level TAP consists of five dedicated signal pins, a 16-state TAP
controller, an instruction register, and three data registers, a boundary
scan register for monitoring and controlling the device’s external pins, a
device identification register, and a 1-bit bypass (do nothing) register.
The top-level TAP provides the ability to:
Certain precautions must be observed to ensure that the top-level
TAP module does not interfere with non-test operation. See
22.10 Non-Scan Chain Operation
The top-level TAP module includes a TAP controller, a 4-bit instruction
register, and three test data registers (a 1-bit bypass register, a 200-bit
boundary scan register, and a 32-bit IDCODE register). The top-level tap
controller and the low-level (OnCE) TAP controller share the external
signals described here.
1. Perform boundary scan (external pin) drive and monitor
2. Disable the output pins
3. Read the IDCODE Device Identification Register
Freescale Semiconductor, Inc.
For More Information On This Product,
operations to test circuitry external to these devices
JTAG Test Access Port and OnCE
Go to: www.freescale.com
for details.
JTAG Test Access Port and OnCE
Top-Level Test Access Port (TAP)
Advance Information
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