MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 462

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Queued Analog-to-Digital Converter (QADC)
19.8.6.2 QADC Status Register 1 (QASR1)
Advance Information
462
Address: 0x00ca_0012 and 0x00ca_0013
Reset:
Reset:
Read:
Read:
Write:
Write:
Stop mode resets this register ($3f3f).
Read: Anytime
Write: Never
CWPQ1[5:0] — Queue 1 Command Word Pointer Field
Finally, when queue 1 operation is terminated after a CCW is read
that is pointed to by BQ2, the CWP points to the same CCW as BQ2.
During stop mode, CWP is reset to 0 because the control registers
and the analog logic are reset. When debug mode is entered, CWP is
not changed; it points to the last executed CCW.
CWPQ1[5:0] points to the last queue 1 CCW executed. This is a
read-only field with a valid range of 0 to 63; writes have no effect.
CWPQ1 always points to the last executed CCW in queue 1,
regardless of which queue is active.
In contrast to CWP, CPWQ1 is updated when a conversion result is
written. When the QADC finishes a conversion in queue 1, both the
result register is written and CWPQ1 is updated.
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Bit 15
Bit 7
0
0
0
0
Figure 19-13. QADC Status Register 1 (QASR1)
Go to: www.freescale.com
= Writes have no effect and the access terminates without a transfer error exception.
14
0
0
6
0
0
CWPQ15 CWPQ14 CWPQ13 CWPQ12 CWPQ11 CWPQ10
CWPQ25 CWPQ24 CWPQ23 CWPQ22 CWPQ21 CWPQ20
13
1
5
1
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
12
1
4
1
11
1
3
1
10
1
2
1
9
1
1
1
MOTOROLA
Bit 8
Bit 0
1
1