AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 19

• Manufacturer Part Number: AX500-1BG896
• Description: Axcelerator Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Power Estimation Example
This example employs an AX1000 shift-register design with 1,080 R-cells, one C-cell, one reset input, and one LVTTL
12mA Output, with High Slew.
This design uses one HCLK at 100 MHz.
ms =
Fs
s
mc =
F
F
No RAM/FIFO in this shift-register
No PLL in this shift-register
P
pi
po
ac
~ 0 MHz
= P
= 50 MHz
=
=
=> P
=> P
=> P
=>
=> P
=>
=> P
HCLK
1,080 (in a shift register - 100% of R-cells are toggling at each clock cycle)
100 MHz
1080
and Fs = 100 MHz
1 (1 C-cell in this shift-register)
and Fs = 100 MHz
and pi= 1 (1 reset input => this is why F
P
and po = 1
P
P
P
HCLK
R-cells
C-cells
inputs
outputs
memory
PLL
dc
total
+ P
= 7.5mA * 1.5V = 11.25 mW
= 0 mW
= P
CLK
= (P1 + P2 * s + P3 * sqrt[s]) * Fs = 79 mW
= P7 * ms * Fs = 173 mW
= P8 * mc * Fs = 0.14 mW
= P9 * pi * F
= P
= 0 mW
dc
+ P
I/O
+ P
R-cells
* po * F
ac
= 11.25 mW + 276mW = 290.30 mW
+ P
pi
= 0 mW
C-cells
po
= 27.10 mW
+ P
inputs
+ P
pi
outputs
=0)
+ P
v2.7
memory
+ P
PLL
= 276 mW
Axcelerator Family FPGAs
2-5