AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 51

• Manufacturer Part Number: AX500-1BG896
• Description: Axcelerator Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

SSTL3
Stub Series Terminated Logic for 3.3V is a general-purpose 3.3V memory bus standard (JESD8-8). The Axcelerator
devices support both classes of this standard. This requires a differential amplifier input buffer and a push-pull output
buffer.
Class I
Table 2-49 • DC Input and Output Levels
AC Loadings
Figure 2-23 • AC Test Loads
Table 2-50 • AC Waveforms, Measuring Points, and Capacitive Loads
Timing Characteristics
Table 2-51 • 3.3V SSTL3 Class I I/O Module
*Measuring Point = V
Parameter
3.3V SSTL3 Class I I/O Module Timing
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DP
PY
ICLKQ
OCLKQ
SUD
SUE
HD
HE
CPWHL
CPWLH
WASYN
REASYN
HASYN
CLR
PRESET
Min,V
-0.3
Input Low (V)
V
REF
V
-1.0
Worst-Case Commercial Conditions V
IL
V
Max,V
Input Buffer
Output Buffer
Clock-to-Q for the I/O input register
Clock-to-Q for the IO output register and the I/O
enable register
Data Input Set-Up
Enable Input Set-Up
Data Input Hold
Enable Input Hold
Clock Pulse Width High to Low
Clock Pulse Width Low to High
Asynchronous Pulse Width
Asynchronous Recovery Time
Asynchronous Removal Time
Asynchronous Clear-to-Q
Asynchronous Preset-to-Q
REF
-0.2
trip
Input High (V)
V
Min,V
REF
V
Description
REF
+0.2
+1.0
V
IH
Max,V
Test Point
CCA
3.6
Measuring Point* (V)
= 1.425V, V
v2.7
V
25
REF
CCI
Min.
V
0.43
0.45
0.43
Max,V
V
'–2' Speed
REF
V
TT
= 3.0V, T
50
OL
-0.6
30 pF
Max.
1.82
2.21
0.67
0.67
0.23
0.26
0.00
0.00
0.10
0.00
0.23
0.23
J
= 70°C
Min.
V
0.48
0.51
0.48
'–1' Speed
REF
V
Min,V
REF
V
1.50
OH
(typ) (V)
+0.6
Max.
2.07
2.52
0.77
0.77
0.27
0.30
0.00
0.00
0.10
0.00
0.27
0.27
Axcelerator Family FPGAs
Min.
0.57
0.60
0.57
'Std' Speed
mA
I
OL
8
Max.
C
2.44
2.96
0.90
0.90
0.31
0.35
0.00
0.00
0.10
0.00
0.31
0.31
load
30
(pF)
mA
I
Units
OH
-8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-37