AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 36

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AX500-1BG896

Manufacturer Part Number
AX500-1BG896
Description
Axcelerator Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
3.3V LVTTL
Low-Voltage Transistor-Transistor Logic is a general purpose standard (EIA/JESD) for 3.3V applications. It uses an LVTTL
input buffer and push-pull output buffer.
Table 2-19 • DC Input and Output Levels
AC Loadings
Figure 2-15 • AC Test Loads
Table 2-20 • AC Waveforms, Measuring Points, and Capacitive Load
Timing Characteristics
Table 2-21 • 3.3V LVTTL I/O Module
2 -2 2
* Measuring Point = V
Parameter
LVTTL Output Drive Strength = 1 (8mA) / Low Slew Rate
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DP
PY
ICLKQ
OCLKQ
SUD
SUE
HD
HE
CPWHL
CPWLH
WASYN
REASYN
HASYN
CLR
PRESET
Axcelerator Family FPGAs
Input Low (V)
Min,V
-0.3
0
V
Worst-Case Commercial Conditions V
IL
Input Buffer
Output Buffer
Clock-to-Q for the I/O input register
Clock-to-Q for the IO output register and the I/O enable
register
Data Input Set-Up
Enable Input Set-Up
Data Input Hold
Enable Input Hold
Clock Pulse Width High to Low
Clock Pulse Width Low to High
Asynchronous Pulse Width
Asynchronous Recovery Time
Asynchronous Removal Time
Asynchronous Clear-to-Q
Asynchronous Preset-to-Q
Max,V
0.8
trip
Input High (V)
Test Point
for t
pd
3.0
Min,V
2.0
Description
Measuring Point* (V)
35 pF
V
IH
Max,V
CCA
3.6
1.40
= 1.425V, V
Test Point
v2.7
for tristate
CCI
Max,V
V
0.4
= 3.0V, T
R=1k
OL
Min.
0.43
0.45
0.43
V
'–2' Speed
REF
(typ) (V)
J
N/A
R to V
R to GND for t
35 pF for t
5 pF for t
= 70°C
Max.
14.32
1.72
0.67
0.67
0.23
0.26
0.00
0.00
0.10
0.00
0.23
0.23
CCI
Min,V
V
Min.
0.48
0.51
0.48
2.4
for t
'–1' Speed
phz
OH
pzh
/t
plz
/t
plz
phz
pzl
/t
Max.
16.31
1.96
0.77
0.77
0.27
0.30
0.00
0.00
0.10
0.00
0.27
0.27
pzl
/t
pzh
'Std' Speed
Min.
0.57
0.60
0.57
mA
C
I
24
OL
load
35
(pF)
Max.
19.19
2.31
0.90
0.00
0.10
0.00
0.31
0.31
0.90
0.31
0.35
0.00
mA
I
–24
OH
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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