AX500-1BG896 ACTEL [Actel Corporation], AX500-1BG896 Datasheet - Page 62

• Manufacturer Part Number: AX500-1BG896
• Description: Axcelerator Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Timing Models and Waveforms
Figure 2-32 • R-Cell Delays
Timing Characteristics
Table 2-62 • R-Cell
2 -4 8
PRESET
Parameter
R-Cell Propagation Delays
t
t
t
t
t
t
t
t
t
t
t
t
RCO
CLR
PRESET
SUD
SUE
HD
HE
WASYN
REASYN
HASYN
CPWHL
CPWLH
Axcelerator Family FPGAs
CLK
CLR
Q
D
E
Worst-Case Commercial Conditions V
Sequential Clock-to-Q
Asynchronous Clear-to-Q
Asynchronous Preset-to-Q
Flip-Flop Data Input Set-Up
Flip-Flop Enable Input Set-Up
Flip-Flop Data Input Hold
Flip-Flop Enable Input Hold
Asynchronous Pulse Width
Asynchronous Recovery Time
Asynchronous Removal Time
Clock Pulse Width High to Low
Clock Pulse Width Low to High
t
SUE
Description
t
HE
t
SUD
t
RCO
t
CCA
HD
= 1.425V, V
v2.7
Min.
0.43
0.42
0.40
'–2' Speed
t
t
CCI
WASYN
HASYN
= 3.0V, T
Max.
0.67
0.23
0.23
0.23
0.26
0.00
0.00
0.10
0.00
t
t
REASYN
CLR
J
= 70°C
Min.
0.47
0.46
0.48
'–1' Speed
t
CPWHL
t
PRESET
Max.
0.77
0.27
0.27
0.27
0.30
0.00
0.00
0.10
0.00
t
CPWLH
t
WASYN
Min.
t
0.57
0.55
0.54
HASYN
'Std' Speed
t
REASYN
Max.
0.90
0.31
0.31
0.31
0.35
0.00
0.00
0.10
0.00
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns